What Registers Do Registers Go Into Assembly

Assembly - Registers

Processor operations mostly involve processing data. This data tin be stored in memory and accessed from thereon. However, reading information from and storing data into retentiveness slows down the processor, every bit it involves complicated processes of sending the data asking across the control jitney and into the retentiveness storage unit and getting the data through the same aqueduct.

To speed up the processor operations, the processor includes some internal retentiveness storage locations, chosen registers.

The registers store information elements for processing without having to access the retentivity. A limited number of registers are built into the processor bit.

Processor Registers

There are ten 32-fleck and six 16-bit processor registers in IA-32 architecture. The registers are grouped into three categories −

Full general registers,
Control registers, and
Segment registers.

The full general registers are farther divided into the following groups −

Information registers,
Pointer registers, and
Index registers.

Data Registers

Iv 32-bit data registers are used for arithmetics, logical, and other operations. These 32-bit registers tin exist used in iii ways −

Equally complete 32-chip data registers: EAX, EBX, ECX, EDX.
Lower halves of the 32-bit registers can be used as four 16-bit data registers: AX, BX, CX and DX.
Lower and college halves of the above-mentioned four 16-bit registers can exist used as eight 8-scrap data registers: AH, AL, BH, BL, CH, CL, DH, and DL.

Data Registers

Some of these data registers have specific apply in arithmetical operations.

AX is the principal accumulator; information technology is used in input/output and nigh arithmetic instructions. For instance, in multiplication functioning, one operand is stored in EAX or AX or AL register co-ordinate to the size of the operand.

BX is known as the base register, equally it could be used in indexed addressing.

CX is known every bit the count register, equally the ECX, CX registers store the loop count in iterative operations.

DX is known as the information register. It is also used in input/output operations. It is as well used with AX register along with DX for multiply and split operations involving large values.

Pointer Registers

The arrow registers are 32-bit EIP, ESP, and EBP registers and corresponding xvi-fleck right portions IP, SP, and BP. There are three categories of arrow registers −

Didactics Arrow (IP) − The sixteen-scrap IP register stores the offset accost of the next instruction to be executed. IP in association with the CS register (as CS:IP) gives the consummate accost of the electric current instruction in the code segment.
Stack Arrow (SP) − The 16-bit SP register provides the offset value inside the program stack. SP in clan with the SS annals (SS:SP) refers to exist current position of data or address within the program stack.
Base Pointer (BP) − The 16-bit BP annals mainly helps in referencing the parameter variables passed to a subroutine. The address in SS register is combined with the offset in BP to go the location of the parameter. BP tin can as well exist combined with DI and SI as base register for special addressing.

Pointer Registers

Index Registers

The 32-bit index registers, ESI and EDI, and their 16-flake rightmost portions. SI and DI, are used for indexed addressing and sometimes used in addition and subtraction. At that place are 2 sets of index pointers −

Source Index (SI) − It is used every bit source alphabetize for cord operations.
Destination Alphabetize (DI) − It is used equally destination index for string operations.

Index Registers

Control Registers

The 32-bit educational activity arrow register and the 32-bit flags register combined are considered as the command registers.

Many instructions involve comparisons and mathematical calculations and change the status of the flags and another conditional instructions exam the value of these status flags to take the control menstruation to other location.

The mutual flag bits are:

Overflow Flag (OF) − Information technology indicates the overflow of a high-social club chip (leftmost bit) of data later a signed arithmetic operation.
Management Flag (DF) − Information technology determines left or correct direction for moving or comparing string information. When the DF value is 0, the string functioning takes left-to-right direction and when the value is prepare to ane, the string operation takes right-to-left direction.
Interrupt Flag (IF) − Information technology determines whether the external interrupts similar keyboard entry, etc., are to be ignored or processed. Information technology disables the external interrupt when the value is 0 and enables interrupts when ready to i.
Trap Flag (TF) − It allows setting the performance of the processor in single-pace mode. The DEBUG program we used sets the trap flag, so nosotros could step through the execution one instruction at a time.
Sign Flag (SF) − It shows the sign of the outcome of an arithmetic operation. This flag is set according to the sign of a data particular post-obit the arithmetics operation. The sign is indicated by the high-guild of leftmost scrap. A positive result clears the value of SF to 0 and negative issue sets information technology to 1.
Zero Flag (ZF) − It indicates the outcome of an arithmetic or comparison operation. A nonzero result clears the nada flag to 0, and a zero result sets it to 1.
Auxiliary Carry Flag (AF) − It contains the carry from bit iii to fleck 4 following an arithmetic performance; used for specialized arithmetic. The AF is set when a one-byte arithmetic operation causes a carry from chip 3 into fleck 4.
Parity Flag (PF) − It indicates the total number of 1-bits in the upshot obtained from an arithmetic operation. An even number of i-bits clears the parity flag to 0 and an odd number of 1-bits sets the parity flag to 1.
Carry Flag (CF) − Information technology contains the acquit of 0 or 1 from a high-lodge chip (leftmost) later on an arithmetics operation. It also stores the contents of last flake of a shift or rotate operation.

The following tabular array indicates the position of flag $.25 in the 16-bit Flags register:

Flag:					O	D	I	T	S	Z		A		P		C
Bit no:	15	fourteen	thirteen	12	xi	x	ix	eight	7	6	v	4	3	2	one	0

Segment Registers

Segments are specific areas defined in a program for containing information, code and stack. At that place are three primary segments −

Lawmaking Segment − It contains all the instructions to be executed. A sixteen-chip Code Segment register or CS register stores the starting accost of the code segment.
Data Segment − It contains information, constants and piece of work areas. A 16-bit Data Segment register or DS register stores the starting address of the data segment.
Stack Segment − Information technology contains data and return addresses of procedures or subroutines. It is implemented as a 'stack' data construction. The Stack Segment annals or SS register stores the starting accost of the stack.

Apart from the DS, CS and SS registers, in that location are other extra segment registers - ES (extra segment), FS and GS, which provide additional segments for storing data.

In assembly programming, a program needs to access the memory locations. All memory locations within a segment are relative to the starting accost of the segment. A segment begins in an address evenly divisible by 16 or hexadecimal 10. So, the rightmost hex digit in all such retentiveness addresses is 0, which is not mostly stored in the segment registers.

The segment registers stores the starting addresses of a segment. To get the exact location of data or instruction within a segment, an offset value (or deportation) is required. To reference any memory location in a segment, the processor combines the segment address in the segment register with the commencement value of the location.

Example

Wait at the post-obit simple programme to understand the apply of registers in assembly programming. This program displays nine stars on the screen along with a unproblematic bulletin −

section	.text    global _start	 ;must be declared for linker (gcc) 	 _start:	         ;tell linker entry point    mov	edx,len  ;message length    mov	ecx,msg  ;message to write    mov	ebx,1    ;file descriptor (stdout)    mov	eax,four    ;system phone call number (sys_write)    int	0x80     ;call kernel 	    mov	edx,nine    ;message length    mov	ecx,s2   ;bulletin to write    mov	ebx,one    ;file descriptor (stdout)    mov	eax,4    ;organisation call number (sys_write)    int	0x80     ;call kernel 	    mov	eax,1    ;organisation call number (sys_exit)    int	0x80     ;phone call kernel 	 section	.information msg db 'Displaying nine stars',0xa ;a message len equ $ - msg  ;length of bulletin s2 times ix db '*'

When the higher up code is compiled and executed, it produces the following result −

Displaying 9 stars *********